Previous: AArch64-Regs, Up: AArch64 Syntax [Contents][Index]

#### 9.1.2.3 Relocations

Relocations for ‘`MOVZ`’ and ‘`MOVK`’ instructions can be generated by prefixing the label with ‘`#:abs_g2:`’ etc. For example to load the 48-bit absolute address of foo into x0:

            movz x0, #:abs_g2:foo		// bits 32-47, overflow check
            movk x0, #:abs_g1_nc:foo	// bits 16-31, no overflow check
            movk x0, #:abs_g0_nc:foo	// bits  0-15, no overflow check

Relocations for ‘`ADRP`’, and ‘`ADD`’, ‘`LDR`’ or ‘`STR`’ instructions can be generated by prefixing the label with ‘`#:pg_hi21:`’ and ‘`#:lo12:`’ respectively.

For example to use 33-bit (+/-4GB) pc-relative addressing to load the address of foo into x0:

            adrp x0, #:pg_hi21:foo
            add  x0, x0, #:lo12:foo

Or to load the value of foo into x0:

            adrp x0, #:pg_hi21:foo
            ldr  x0, [x0, #:lo12:foo]

Note that ‘`#:pg_hi21:`’ is optional.

            adrp x0, foo

is equivalent to

            adrp x0, #:pg_hi21:foo