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#### 9.23.1 M680x0 Options

The Motorola 680x0 version of `as` has a few machine dependent options:

‘`-march=architecture`’

  This option specifies a target architecture. The following architectures are recognized: `68000`, `68010`, `68020`, `68030`, `68040`, `68060`, `cpu32`, `isaa`, `isaaplus`, `isab`, `isac` and `cfv4e`.

‘`-mcpu=cpu`’

  This option specifies a target cpu. When used in conjunction with the `-march` option, the cpu must be within the specified architecture. Also, the generic features of the architecture are used for instruction generation, rather than those of the specific chip.

‘`-m[no-]68851`’
‘`-m[no-]68881`’
‘`-m[no-]div`’
‘`-m[no-]usp`’
‘`-m[no-]float`’
‘`-m[no-]mac`’
‘`-m[no-]emac`’

  Enable or disable various architecture specific features. If a chip or architecture by default supports an option (for instance `-march=isaaplus` includes the `-mdiv` option), explicitly disabling the option will override the default.

‘`-l`’

  You can use the ‘`-l`’ option to shorten the size of references to undefined symbols. If you do not use the ‘`-l`’ option, references to undefined symbols are wide enough for a full `long` (32 bits). (Since `as` cannot know where these symbols end up, `as` can only allocate space for the linker to fill in later. Since `as` does not know how far away these symbols are, it allocates as much space as it can.) If you use this option, the references are only one word wide (16 bits). This may be useful if you want the object file to be as small as possible, and you know that the relevant symbols are always less than 17 bits away.

‘`--register-prefix-optional`’

  For some configurations, especially those where the compiler normally does not prepend an underscore to the names of user variables, the assembler requires a ‘`%`’ before any use of a register name. This is intended to let the assembler distinguish between C variables and functions named ‘`a0`’ through ‘`a7`’, and so on. The ‘`%`’ is always accepted, but is not required for certain configurations, notably ‘`sun3`’. The ‘`--register-prefix-optional`’ option may be used to permit omitting the ‘`%`’ even for configurations for which it is normally required. If this is done, it will generally be impossible to refer to C variables and functions with the same names as register names.

‘`--bitwise-or`’

  Normally the character ‘`|`’ is treated as a comment character, which means that it can not be used in expressions. The ‘`--bitwise-or`’ option turns ‘`|`’ into a normal character. In this mode, you must either use C style comments, or start comments with a ‘`#`’ character at the beginning of a line.

‘`--base-size-default-16 --base-size-default-32`’

  If you use an addressing mode with a base register without specifying the size, `as` will normally use the full 32 bit value. For example, the addressing mode ‘`%a0@(%d0)`’ is equivalent to ‘`%a0@(%d0:l)`’. You may use the ‘`--base-size-default-16`’ option to tell `as` to default to using the 16 bit value. In this case, ‘`%a0@(%d0)`’ is equivalent to ‘`%a0@(%d0:w)`’. You may use the ‘`--base-size-default-32`’ option to restore the default behaviour.

‘`--disp-size-default-16 --disp-size-default-32`’

  If you use an addressing mode with a displacement, and the value of the displacement is not known, `as` will normally assume that the value is 32 bits. For example, if the symbol ‘`disp`’ has not been defined, `as` will assemble the addressing mode ‘`%a0@(disp,%d0)`’ as though ‘`disp`’ is a 32 bit value. You may use the ‘`--disp-size-default-16`’ option to tell `as` to instead assume that the displacement is 16 bits. In this case, `as` will assemble ‘`%a0@(disp,%d0)`’ as though ‘`disp`’ is a 16 bit value. You may use the ‘`--disp-size-default-32`’ option to restore the default behaviour.

‘`--pcrel`’

  Always keep branches PC-relative. In the M680x0 architecture all branches are defined as PC-relative. However, on some processors they are limited to word displacements maximum. When `as` needs a long branch that is not available, it normally emits an absolute jump instead. This option disables this substitution. When this option is given and no long branches are available, only word branches will be emitted. An error message will be generated if a word branch cannot reach its target. This option has no effect on 68020 and other processors that have long branches. see Branch Improvement.

‘`-m68000`’

  `as` can assemble code for several different members of the Motorola 680x0 family. The default depends upon how `as` was configured when it was built; normally, the default is to assemble code for the 68020 microprocessor. The following options may be used to change the default. These options control which instructions and addressing modes are permitted. The members of the 680x0 family are very similar. For detailed information about the differences, see the Motorola manuals.

  ‘`-m68000`’
  ‘`-m68ec000`’
  ‘`-m68hc000`’
  ‘`-m68hc001`’
  ‘`-m68008`’
  ‘`-m68302`’
  ‘`-m68306`’
  ‘`-m68307`’
  ‘`-m68322`’
  ‘`-m68356`’

    Assemble for the 68000. ‘`-m68008`’, ‘`-m68302`’, and so on are synonyms for ‘`-m68000`’, since the chips are the same from the point of view of the assembler.

  ‘`-m68010`’

    Assemble for the 68010.

  ‘`-m68020`’
  ‘`-m68ec020`’

    Assemble for the 68020. This is normally the default.

  ‘`-m68030`’
  ‘`-m68ec030`’

    Assemble for the 68030.

  ‘`-m68040`’
  ‘`-m68ec040`’

    Assemble for the 68040.

  ‘`-m68060`’
  ‘`-m68ec060`’

    Assemble for the 68060.

  ‘`-mcpu32`’
  ‘`-m68330`’
  ‘`-m68331`’
  ‘`-m68332`’
  ‘`-m68333`’
  ‘`-m68334`’
  ‘`-m68336`’
  ‘`-m68340`’
  ‘`-m68341`’
  ‘`-m68349`’
  ‘`-m68360`’

    Assemble for the CPU32 family of chips.

  ‘`-m5200`’
  ‘`-m5202`’
  ‘`-m5204`’
  ‘`-m5206`’
  ‘`-m5206e`’
  ‘`-m521x`’
  ‘`-m5249`’
  ‘`-m528x`’
  ‘`-m5307`’
  ‘`-m5407`’
  ‘`-m547x`’
  ‘`-m548x`’
  ‘`-mcfv4`’
  ‘`-mcfv4e`’

    Assemble for the ColdFire family of chips.

  ‘`-m68881`’
  ‘`-m68882`’

    Assemble 68881 floating point instructions. This is the default for the 68020, 68030, and the CPU32. The 68040 and 68060 always support floating point instructions.

  ‘`-mno-68881`’

    Do not assemble 68881 floating point instructions. This is the default for 68000 and the 68010. The 68040 and 68060 always support floating point instructions, even if this option is used.

  ‘`-m68851`’

    Assemble 68851 MMU instructions. This is the default for the 68020, 68030, and 68060. The 68040 accepts a somewhat different set of MMU instructions; ‘`-m68851`’ and ‘`-m68040`’ should not be used together.

  ‘`-mno-68851`’

    Do not assemble 68851 MMU instructions. This is the default for the 68000, 68010, and the CPU32. The 68040 accepts a somewhat different set of MMU instructions.

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